BIB-VERSION:: CS-TR-v2.0
          ID:: STAN//CS-TR-74-420
       ENTRY:: August 23, 1995
ORGANIZATION:: Stanford University, Department of Computer Science
       TITLE:: Partially self-checking ciruits and their use in performing
               logical operations.
        TYPE:: Technical Report
      AUTHOR:: Wakerly, John F.
        DATE:: August 1973
       PAGES:: 56
    ABSTRACT:: A new class of circuits called partially self-checking
               circuits is described. These circuits have one mode of
               operation called secure mode in which they have the
               properties of totally self-checking circuits; that is, every
               fault is tested during normal operation and no fault can
               cause an undetected error. They also have an insecure mode of
               operation with the property that any fault which affects a
               result in insecure mode is tested by some input in secure
               mode; however, undetected errors may occur in insecure mode.
               One application of these circuits is in the arithmetic and
               logic unit of a computer with data encoded in an
               error-detecting code. While there is no code simpler than
               duplication which detects single errors in logical operations
               such as AND and OR, it is shown that there exist partially
               self-checking networks to perform these operations. A
               commercially available MSI chip, the 74181 4-bit ALU, can be
               used in a partially self-checking network to perform
               arithmetic and logical operations.
       NOTES:: [Adminitrivia V1/Prg/19950823]
         END:: STAN//CS-TR-74-420